A Method and Apparatus for Combining Independent Data Caches

Introduction

Data memory accesses are one of the single largest components of performance loss in modern microprocessor systems. This invention describes a way to make hardware memory systems more flexible, so that a given design can be configured to match the needs of whatever application is running, resulting in greater power efficiency and performance.

Benefits

By allowing multiple data caches to be treated as a single logical cache with an adjustable sharing degree, a wider range of applications will run well on a fixed substrate, with more efficient communication patterns.

Features

Ability to alter the number of banks existing as a single coherence unit, as well as to change the degree of interleaving among the banks participating in as a single coherence unit.

Market Potential/Applications

High-performance, low-power data processing systems

For further information please contact

University of Texas,
Austin, USA
Website : www.otc.utexas.edu